ADLPC=0, ADIV=00, MODE=00, ADLSMP=0, ADICLK=00
Status and Control Register 3
| ADICLK | Input Clock Select 0 (00): Bus clock 1 (01): Bus clock divided by 2 2 (10): Alternate clock (ALTCLK) 3 (11): Asynchronous clock (ADACK) |
| MODE | Conversion Mode Selection 0 (00): 8-bit conversion (N=8) 1 (01): 10-bit conversion (N=10) 2 (10): 12-bit conversion (N=12) 3 (11): Reserved |
| ADLSMP | Long Sample Time Configuration 0 (0): Short sample time. 1 (1): Long sample time. |
| ADIV | Clock Divide Select 0 (00): Divide ration = 1, and clock rate = Input clock. 1 (01): Divide ration = 2, and clock rate = Input clock * 2. 2 (10): Divide ration = 3, and clock rate = Input clock * 4. 3 (11): Divide ration = 4, and clock rate = Input clock * 8. |
| ADLPC | Low-Power Configuration 0 (0): High speed configuration. 1 (1): Low power configuration:The power is reduced at the expense of maximum clock speed… |
| RESERVED | no description available |